a adm809-5s/l rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective companies. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ? 2003 analog devices, inc. all rights reserved. microprocessor supervisory circuit functional block diagram v ref v cc reset generator 55ms adm809-5s/l reset gnd features specified over temperature low power consumption (17 a) precision voltage monitor: 3 v, 5 v options reset assertion down to 1 v v cc 30 ms min power-on reset logic low reset output available in sot-23 and sc70 packages applications microprocessor systems computers controllers intelligent instruments automotive systems general description the adm809-5s/l supervisory circuit monitors the power supply voltage in microprocessor systems. it provides a reset output during power-up, power-down, and brownout conditions. on power-up, an internal timer holds reset asserted for 55 ms. this holds the microprocessor in a reset state until conditions have stabilized. the reset output remains operational with v cc as low as 1 v. the adm809-5s/l provides an active low reset signal ( reset ). t he reset comparator features built-in glitch immunity, mak ing it immune to fast transients on v cc . the adm809-5s/l consumes only 17 a, making it suitable for low power portable equipment. reset reset input gnd gnd v cc v cc p system adm809-5s/l v cc figure 1. typical operating circuit
e2e rev. a adm809-5s/lespecifications parameter min typ max unit test conditions/comments v cc operating voltage range 1.0 3.3 5.5 v t a = 0 c to 150 c with 100 k pull-down on o utput (figure 3) 1.2 3.3 5.5 v t a = e40 c to +150 c with 22 k external pull-up on output (figure 6) supply current 24 60 av cc < 5.5 v, adm8_l, t a = e40 c to +150 c 17 50 av cc < 3.6 v, adm8_s, t a = e40 c to +150 c reset threshold reset voltage threshold adm809-5l 4.5 4.75 v t a = e40 c to +85 c adm809-5l 4.40 4.86 v t a = 85 c to 150 c adm809-5s 2.85 3.00 v t a = e40 c to +85 c adm809-5s 2.78 3.08 v t a = 85 c to 150 c reset threshold temperature coefficient 30 ppm/ c v cc to reset delay 20 sv cc = v th to (v th e100 mv) reset active timeout period 30 55 80 ms t a = e40 c to +150 c r eset output voltage low 0.3 v v cc = v th min, i sink = 1.2 ma, adm809-5s 0.4 v v cc = v th min, i sink = 3.2 ma, adm809-5l 0.3 v v cc >1.0 v, i sink = 50 a, t a = 0 c to 150 c v cc >1.2 v, i sink = 50 a, t a = e40 c to +150 c reset output voltage high 0.8 v cc vv cc > v th max, i source = 500 a v cc e 1.5 v v cc > v th max, i source = 800 a junction temperature e40 +150 c (v cc = full operating range, t a = t min to t max , v cc typ = 5 v for l, 3.3 v for s models, unless otherwise noted.) absolute maximum ratings * (t a = 25 c, unless otherwise noted.) v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e0.3 v to +6 v reset, reset . . . . . . . . . . . . . . . . . . e0.3 v to v cc + 0.5 v input current v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ma output current reset, reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ma rate of rise, v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 v/ s ja thermal impedance, sot-23 . . . . . . . . . . . . . . . 270 c/w ja thermal impedance, sc70 . . . . . . . . . . . . . . . . . 146 c/w lead temperature (soldering, 10 sec) . . . . . . . . . . . . . 300 c vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c storage temperature range . . . . . . . . . . . . . e65 c to +150 c * stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum ratings for extended periods of time may affect device reliability. caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. a lthough the adm809-5s/l features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommen ded to avoid performance degradation or loss of functionality.
adm809-5s/l e3e rev. a v cc reset t1 t1 v ref v ref v ref v ref t1 = reset time = 55ms typ. v ref = reset voltage threshold figure 2. power fail reset t t reset t reset t s tesrts reset reset s rt te s s reset rere r t t r t rtree st rtree st sree s sree s srtree s st srtree s st ssree s s ssree s s ss
adm809-5s/l e4e rev. a temperature e c 30 0 e40 e20 020406080 25 20 15 10 5 85 v cc = 5v v cc = 3v v cc = 1v supply current e a tpc 1. supply current vs. temperature (no load) temperature e c 0 e40 e20 020406080 20 40 60 80 100 120 140 160 180 85 v od = v th e v cc v od = 20mv v od = 100mv v od = 200mv v od = 10mv power down reset e s tpc 4. power-down reset delay vs. temperature adm809-5s etypical performance characteristics adm8_l 400 350 0 11 0 1000 100 300 250 50 200 150 100 adm8_s reset comparator overdrive (v th e v cc ) e mv maximum transient duration e s tpc 2. maximum transient dura- tion without causing a reset pulse vs. reset comparator overdrive temperature e c 0.9990 e40 e20 0204 06080 1.0020 1.0015 1.0010 1.0005 1.0000 0.9995 85 normal reset threshold tpc 5. normalized reset voltage threshold vs. temperature temperature e c 0 e40 e20 020406080 20 40 60 80 100 120 140 160 180 200 85 v od = v th e v cc v od = 20mv v od = 100mv v od = 200mv v od = 10mv power-down reset e s tpc 3. power-down reset delay vs. temperature adm809-5l
adm809-5s/l e5e rev. a interfacing to other devices? output the adm809-5s/l is designed to integrate with as many devices as possible and therefore has an output dependent on v cc . because of this design approach, interfacing this device to other devices is simplified. ensuring a valid reset output down to v cc = 0 v when v cc falls below 0.8 v, adm809-5s/l?s reset no longer sinks current. a high impedance cmos logic input connected to reset may, therefore, drift to undetermined logic levels. to eliminate this problem, a 100 k resistor should be connected from reset to ground. v cc v cc gnd reset adm809-5s/l 100k figure 3. ensuring a valid reset eetserrte reset tres reset reset t s s t tertrressrst teterrts ts rrteer s e t reset terses ees reset s e reset s
adm809-5s/l e6e rev. a 3-lead small outline transistor package [sot-23] (rt-3) dimensions shown in millimeters 3.04 2.90 2.80 pin 1 1.40 1.30 1.20 2.64 2.10 1.90 bsc 1 2 3 seating plane 1.12 0.89 0.10 0.01 0.50 0.30 0.20 0.08 0.60 0.50 0.40 0.95 bsc compliant to jedec standards to-236ab 3-lead thin shrink small outline transistor package [sc70] (ks-3) dimensions shown in millimeters 0.30 0.15 0.10 max 1.00 0.90 0.70 seating plane 1.10 max 0.22 0.08 0.46 0.36 0.26 3 1 2 2.00 bsc pin 1 2.10 bsc 0.65 bsc 1.25 bsc 0.10 coplanarity outline dimensions
adm809-5s/l e7e rev. a revision history location page 3/03?data sheet changed from rev. 0 to rev. a. added sc70 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . universal changes to features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 changes to specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 changes to absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 changes to table i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 changes to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 changes to tpc 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
e8e c00090e0e3/03(a)
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